This disclosure relates generally to buried SOI wafers and particularly to buried SOI wafers with a diffusion barrier in the buried SOI layer.
Through silicon via (TSV) semiconductor devices contain copper and use mobile ion, such as sodium or potassium, containing processes such as chemical mechanical polish (CMP). Copper or mobile ions can diffuse through silicon or oxide during packaging or chip use and reach devices such as FET's or MOS capacitors, resulting in threshold voltage shifts and other device degradation. Silicon on insulator wafers, which use a buried oxide (BOX), are used to form integrated circuits and the BOX can provide an unintended diffusion path for mobile ions or copper. The current trend is to use thinner silicon wafers with greater bow and higher aspect ratio TSV's (shorter and narrower TSV's), further increasing contamination concerns.